ADVANCED VERIFICATION TECHNIQUES: A SYSTEMC BASED APPROACH FOR SUCCESSFUL TAPEOUT

Publisher: Springer; 1 edition
Language: English
ISBN: 140207672X
Paperback: 395 pages
Data: June 8, 2004
Format: PDF
Description: “As defect filler and complexness continues to acquire exponentially, the challenges of useful substantiation are decent a grave supply in the electronics industry. It is today commonly heard that formal errors uncomprehensible during useful substantiation are the most ordinary drive of defect re-spins, and that the costs related with useful substantiation are today outweighing the costs of defect design. To manage with these challenges engineers are progressively relying on newborn organisation and substantiation methodologies and languages. Transaction-based organisation and verification, unnatural haphazard input generation, useful news analysis, and assertion-based substantiation are every techniques that modern organisation and substantiation teams routinely ingest today. Engineers are also progressively motion to organisation and substantiation models supported on C/C++ and SystemC in visit to physique more abstract, higher action element and code models and to carelessness the limitations of RTL HDLs. This newborn book, Advanced Verification Techniques, provides limited counselling for these modern substantiation techniques. The aggregation includes graphic examples and shows how SystemC and SCV crapper be practical to a difference of modern organisation and substantiation tasks.”

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